The present invention relates generally to semiconductor packaging. More specifically, the present invention relates to the packaging of semiconductors using multiple layers of dice.
To facilitate discussion, FIG. 1 is a cross-sectional view of a molded integrated circuit (IC) package that may be provided by the prior art. In such an IC package 100, an integrated circuit die 104 is mounted on a die attach pad 108. Leads 112 of a lead frame extend to a location close to the IC die 104. Wires 116 extend from die bond pads on the IC die 104 to the leads 112 to provide electrical connections between the IC die 104 and the leads. A thermoset plastic casing 120 encases and surrounds the IC die 104, wires 116, and parts of the leads 112 closest to the IC die 104, leaving exposed parts of the leads 112 furthest from the IC die 104.
FIG. 2 is a planar view of the lead frame 122 with leads 112 and the die attach pad 108 shown in FIG. 1. The lead frame 122 further comprises a skirt 126 surrounding the periphery of the lead frame 122 and tie bars 130 that connect the skirt 126 to the die attach pad 108. The skirt 126 may be used to support the leads 112, which are attached to the skirt 126 and the die attach pad. During the manufacturing of the IC package, the skirt 126 is removed.
Such IC packages may require a footprint that is much greater than the footprint of the IC die. In view of the foregoing, it is desirable to provide an IC package that has a small footprint.
To achieve the foregoing and other objects and in accordance with the purpose of the present invention, a variety of techniques for providing a multi-chip module is described. Generally, a first side of a first semiconductor device is connected to a first side of the plurality of leads. A second semiconductor device is then connected to the first side of the first semiconductor.
These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.